HyperLithTM adds Wafer Topography Capabilities Perfect for Double Patterning Simulations Immersion bubble, reflective notching, non-planar resist surface, underlying structures Calculate image-in-resist in the presence of topography rigorously with TEMPESTpr2 Hardware Acceleration and Parallel Processing Powerful 3D geometry editor lets user define and visualize the wafer geometry See the demo video

HyperLithTM Simulator! Easy-to-use and Powerful Supports scalar and rigorous, EUV and DUV technologies Hardware Acceleration, Parallel Processing, Distributed Computing Windows & Linux 32/64 bit Use pre-defined mask technologies and patterns or create your own Export .sim file for EM-Suite Click here for a demo video and more details

Panoramic Technology Celebrates 10^th Anniversary!

Why Choose Panoramic?