panoramictech.com

Panoramic Technology Inc., founded in 1999, develops and globally markets simulation software for advanced semiconductor lithography.  The company has a proven track record of leadership and continues to be a leader in the lithography simulation community within the semiconductor industry.

The company's products allow lithographers to simulate the semiconductor lithography process, modeling the mask, the exposure tool and the resist at the wafer.  The company's customers include large and small semiconductor manufacturers, equipment vendors, research institutes, start-ups and universities

Panoramic Technology prides itself in offering the best lithography research simulation software at the best price and in offering extremely responsive customer service.

Key Benefits

  • Poweful and flexible 3D rigorous EMF Solver (FDTD and RCWA and TRIG) for mask/wafer/general geometries
  • The most advanced EUV modeling (including anamorphic imaging)
  • Source optimization with rigorous mask model
  • Correct FEM modeling of resist shrinkage (due to SEM exposure and PEB for NTD resists)
  • Extensive distributed/cluster/network computing capabilities
  • Comprehensive data visualization and post-processing capabilities
  • Powerful batching capabilities
  • Phython/MATLAB/Octave/Java API
  • GDS-II layout integration (with editor and advanced operations)
  • Small-area OPC (rigorous and scalar model-based)
  • Windows and Linux support
  • Hardware accelerated FDTD (NVIDIA GPU)
  • Easy-to-use interface HyperLith(TM)
  • Price!  Yes!  A better simulator for less!  (read How & Why?)

Panoramic's proven track record of leadership

When compared to our nearest two competitors, Panoramic has a long history of being the first to offer many important features.

  • 1999: First to offer commercial rigorous FDTD EM-Solver (years before our competitors)
  • 1999: First to offer full vector imaging (years before our competitors)
  • 1999: First to offer rigorous simulator for EUV masks (almost 9 years ahead of one of our competitors)
  • 1999: First to offer rigorous simulator for mask/wafer inspection
  • 2000: First to offer ability to simulate non-constant scattering coefficients
  • 2000: Introduction of very powerful batching capabilities (using formulas and variables)
  • 2001: First to offer parallel computing (SimRunner)
  • 2003: First 64-bit Linux
  • 2003: First to offer full-featured GDS-II layout viewer/editor.
  • 2003: First research simulator to offer rigorous-mask model-based small-area OPC
  • 2004: First to handle immersion & polarization properly
  • 2007: First commercially available truly-distributed FDTD and Abbe imaging code for lithography
  • 2007: First hardware-accelerated FDTD code for lithography
  • 2008: First hardware-accelerated 3D resist model
  • 2008: First 64-bit Windows lithography simulator
  • 2009: HyperLith!  The first easy-to-use, powerful yet reasonably-priced simulator!
  • 2010: First to allow user-written resist models
  • 2010: First to correctly model resist shrinkage effects ("strange distortion", footing, corner rounding bias)
  • 2010: First to offer 64-bit 3D RCWA
  • 2014: First to offer anamorphic imaging (for EUV)
  • 2014: TRIG fastest rigorous EUV simulator

Further Reading

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